Transformerless multilevel inverters (TMLIs) are emerging as a highly attractive solution for grid-connected solar photovoltaic (PV) systems. However, in TMLIs, leakage current will flow due to the absence of galvanic isolation between the PV DC side and the grid AC side. This article proposes a nine-level transformerless direct ground connection type inverter employing three switched capacitors (SCs) to generate a multilevel output waveform. This single-stage topology delivers a quadratic boost and a multilevel outputsuitable for grid connection while maintaining a common ground connection to suppress leakage current. Due to the self-balancing nature of the capacitor voltages, the proposed topology does not require sensor monitoring or dedicated control circuits. The voltage stress on utilised semiconductors and SCs is within the output voltage, which reduces the inverter’s size and cost. In addition, the lower total standing voltage per unit and capacitor voltage diversity factor are also less than those of the other recent topologies. Further, a detailed comparison is needed to show the merits of the proposed inverter over other recent alternatives, including its leakage current removal and boosting factor. Simulations were conducted at an 895 W output power level using the MATLAB/PLECS tools to assess the practical applicability of the proposed inverter. These simulations were further validated through a laboratory experimental setup and presented with the corresponding results.
Pitchai,J B and Periyasamy,V . (2025). A Nine-Level Quadratic Boost Common Ground Inverter Topology with Reduced Voltage Stress on Switches. (e24010). Scientia Iranica, (), e24010 doi: 10.24200/sci.2025.66257.9941
MLA
Pitchai,J B , and Periyasamy,V . "A Nine-Level Quadratic Boost Common Ground Inverter Topology with Reduced Voltage Stress on Switches" .e24010 , Scientia Iranica, , , 2025, e24010. doi: 10.24200/sci.2025.66257.9941
HARVARD
Pitchai J B, Periyasamy V. (2025). 'A Nine-Level Quadratic Boost Common Ground Inverter Topology with Reduced Voltage Stress on Switches', Scientia Iranica, (), e24010. doi: 10.24200/sci.2025.66257.9941
CHICAGO
J B Pitchai and V Periyasamy, "A Nine-Level Quadratic Boost Common Ground Inverter Topology with Reduced Voltage Stress on Switches," Scientia Iranica, (2025): e24010, doi: 10.24200/sci.2025.66257.9941
VANCOUVER
Pitchai J B, Periyasamy V. A Nine-Level Quadratic Boost Common Ground Inverter Topology with Reduced Voltage Stress on Switches. Scientia Iranica. 2025;():e24010. doi: 10.24200/sci.2025.66257.9941
