1
Department of Electronical Engineering,Sharif University of Technology
2
Department of Electrical Engineering and Computer Science,Case Western Reserve University
Abstract
In this paper, an 8-bit CMOS current-mode folding-interpolating ADC is presented. A new
active averaging-interpolating network is described, which results in a better error correction
factor compared to its resistive counterpart. Using novel circuits for fast settling and careful
transistor sizing, a fast (>160 Msps) and low power (70 mW in 2.5 V supply voltage) 8-bit
ADC, with a total chip area of 1 1:4 mm in a 0.25 micron CMOS process, is demonstrated.
Sharif Bakhtiar, M., & Azin, M. (2008). An 8-Bit Current-Mode Folding ADC with Optimized Active Averaging Network. (e2955). Scientia Iranica, 15(2), e2955
MLA
Sharif Bakhtiar, M., & Azin, M. "An 8-Bit Current-Mode Folding ADC with Optimized Active Averaging Network" .e2955 , Scientia Iranica, 15, 2, 2008, e2955.
HARVARD
Sharif Bakhtiar M., Azin M. (2008). 'An 8-Bit Current-Mode Folding ADC with Optimized Active Averaging Network', Scientia Iranica, 15(2), e2955.
CHICAGO
M. Sharif Bakhtiar & M. Azin, "An 8-Bit Current-Mode Folding ADC with Optimized Active Averaging Network," Scientia Iranica, 15 2 (2008): e2955,
VANCOUVER
Sharif Bakhtiar M., Azin M. An 8-Bit Current-Mode Folding ADC with Optimized Active Averaging Network. Scientia Iranica. 2008;15(2):e2955.
