This research presents a novel quadruple boost 9-level single-phase switched-capacitor (SC) inverter. The proposed topology (PT) comprises eight semiconductor switches, two capacitors, one power diode, and a single supply source unit that can synthesize 9 levels of voltage at the output terminal. A brief description of structural design, operating principle, modulation strategy, and determination of optimum values of the capacitances are presented in this work. Simulation and experimental studies have been carried out under different loading conditions to validate the effectiveness of the PT. Further, a fair comparative study with state-of-the-art SC topologies regarding component count per level, gain, total standing voltage, and cost function proves the merits of the suggested novel work.
Jena,K , Gupta,K K and Kumar,D . (2025). A 4-X Gain 9-Level Multilevel Inverter Topology with Reduced Part Count. (e23827). Scientia Iranica, (), e23827 doi: 10.24200/sci.2025.65182.9341
MLA
Jena,K , , Gupta,K K , and Kumar,D . "A 4-X Gain 9-Level Multilevel Inverter Topology with Reduced Part Count" .e23827 , Scientia Iranica, , , 2025, e23827. doi: 10.24200/sci.2025.65182.9341
HARVARD
Jena K, Gupta K K, Kumar D. (2025). 'A 4-X Gain 9-Level Multilevel Inverter Topology with Reduced Part Count', Scientia Iranica, (), e23827. doi: 10.24200/sci.2025.65182.9341
CHICAGO
K Jena, K K Gupta and D Kumar, "A 4-X Gain 9-Level Multilevel Inverter Topology with Reduced Part Count," Scientia Iranica, (2025): e23827, doi: 10.24200/sci.2025.65182.9341
VANCOUVER
Jena K, Gupta K K, Kumar D. A 4-X Gain 9-Level Multilevel Inverter Topology with Reduced Part Count. Scientia Iranica. 2025;():e23827. doi: 10.24200/sci.2025.65182.9341
