Document Type: Article
Faculty of Biomedical Engineering, Czech Technical University in Prague, nám. Sítná 3105, Kladno, Czech Republic
Department of Microelectronics, Brno University of Technology, Technicka 10, Brno, Czech Republic
Department of Telecommunications, Brno University of Technology, Purkynova 118, Brno, Czech Republic
In this work, a new realization topology of the low-voltage ultra-low-power quadrature oscillator is presented. This quadrature oscillator utilizes only two active elements, namely differential voltage current conveyor (DVCC), and five passive ones, all of them are grounded, which is recommended for the integrated circuit implementation. The DVCC is based on quasi-floating-gate MOS transistor, which is a distinct technique from the conventional one, featuring with operation at low-voltage and ultra-low-power conditions; hence the proposed DVCC works with low supply voltage of ± 400 mV and consumes power of merely 6.6 µW. Thanks to these features the total power dissipation of the oscillator is only 0.28 mW. The simulation results using 0.18 µm TSMC CMOS technology are included in order to prove the design correctness.