%0 Journal Article
%T A Hardwired Discrete Simulation Algorithm
%J Scientia Iranica
%I Sharif University of Technology
%Z 1026-3098
%A Nojumi, M.H.
%D 2007
%\ 12/01/2007
%V 14
%N 6
%P -
%! A Hardwired Discrete Simulation Algorithm
%R
%X The architecture of a hardwired simulator for implementation of a iscrete event-driven simulation of digital systems at the logic level is resented. In the design of this system, attempts have been made to utilize echniques of high performance computing to have a system capable of simulating he digital circuits rapidly. The centralized event-driven simulation algorithm hosen here, has the advantages of being efficient and conceptually traightforward. The high reliability of the simulator has been taken care of hrough a collection of handshake signals between each two of the three main odules.
%U http://scientiairanica.sharif.edu/article_2893_ee8b95e37acb3ce4ba99b992ee5b212f.pdf